可以把芯片设计粗略分为三个部分:功能、时序和电源,它们分别对应RTL、SDC和UPF三种设计文件。
前端工程师对RTL和SDC肯定是非常熟悉的,但是UPF(SNPS叫UPF,Cadence叫CPF)更多地是跟后端相关,所以前端不一定了解。这里简单介绍一下UPF的原理。
首先要明白几个概念。
1、Power Domain(PD)
网上关于PD的解释:Hence, the UPF power domain is a collection of instances that are treated as a group for power-management purposes. Power domain defines the group of instances that shares the common set of power supply requirements.
形象化一点的理解,PD就是共用一个电源(包括VDD和VSS)的一堆电路,而且这堆电路的边界往往是根据RTL Hierarchy的boundary来定义的。
2、Supply Nets, Supply Ports, Power Switches
Supply Nets:可以类比RTL里面的wire,用来定义一根电源线,而且只在声明它的PD中有效。
Supply Ports:可以类比RTL里面的port,在电路中它们对应的是电源pin。
Power Switches:这个没有可类比的RTL元素,它就是一个电源开关,其两端电源属于不同的Nets,控制信号来自RTL function电路。
3、Isolation Cell(ISO)
在用到power switch的多电源域芯片中,ISO是必须用到的单元。原因很简单,可关电的PD的逻辑输出,在power down以后呈现X态,如果不加处理连到always on的逻辑,可能导致功能异常。ISO的功能类似AND和OR(取决于掉电后希望保持1还是0),其中ISO_EN由always on domain的信号驱动,在掉电前会先打开ISO_EN,保证掉电PD的输出都处于确定值,然后再关电;反过来,上电完成后才会关闭ISO_EN,从而保证电路的稳定。
那么ISO应该放到关电PD还是always on呢?答案是都可以。放到关电PD的优点是可以节省ISO数量(考虑到一个输出连到多个PD的情况),缺点是需要把always on的power rail拉过来;放到always on的话其电源连接比较简单。笔者更倾向于后者。
4、Power State Table(PST)
用来定义芯片低功耗模式的一张表格,包含power supplies(nets/ports)以及它们在不同模式下的状态(on/off)。
有了这些基本概念,我们可以试着设计一个简单的UPF。文章来源:https://www.toymoban.com/news/detail-438144.html
############################################################################
## UPF Demo ##
############################################################################
## create power domains
create_power_domain chip_top -include_scope
create_power_domain block1 -elements {inst_block1}
create_power_domain block2 -elements {inst_block2}
create_power_domain block3 -elements {inst_block3}
## create common supply net
## VDD is the always on source net for every block
create_supply_net VDD -domain chip_top
create_supply_net VDD -domain block1 -reuse
create_supply_net VDD -domain block2 -reuse
create_supply_net VDD -domain block3 -reuse
## create supply nets for blocks functional logic
create_supply_net VDD_1 -domain block1
create_supply_net VDD_2 -domain block2
create_supply_net VDD_3 -domain block3
## create common VSS net for whole chip
create_supply_net VSS -domain chip_top
create_supply_net VSS -domain block1 -reuse
create_supply_net VSS -domain block2 -reuse
create_supply_net VSS -domain block3 -reuse
## create VDD port and connect it to VDD supply net
create_supply_port VDD
connect_supply_net VDD -ports VDD
## create VSS port and connect it to VSS supply net
create_supply_port VSS
connect_supply_net VSS -ports VSS
## set primary supply net
set_domain_supply_net chip_top -primary_power_net VDD -primary_ground_net VSS
set_domain_supply_net block1 -primary_power_net VDD_1 -primary_ground_net VSS
set_domain_supply_net block2 -primary_power_net VDD_2 -primary_ground_net VSS
set_domain_supply_net block3 -primary_power_net VDD_3 -primary_ground_net VSS
## create power switch
create_power_switch block1_sw -domain block1 -input_supply_port {<PIN_NAME> VDD} -output_supply_port {<PIN_NAME> VDD_1} \
-control_port {<PIN_NAME> inst_always_on/pwr_ctrl} \
-on_state {<state_name> <input_pin_name> <boolean_expression>} \
-off_state {<state_name> <boolean_expression>}
map_power_switch block1_sw -domain block1 -lib_cells {<cell_list>}
create_power_switch block2_sw -domain block2 -input_supply_port {<PIN_NAME> VDD} -output_supply_port {<PIN_NAME> VDD_2} \
-control_port {<PIN_NAME> inst_always_on/pwr_ctrl} \
-on_state {<state_name> <input_pin_name> <boolean_expression>} \
-off_state {<state_name> <boolean_expression>}
map_power_switch block2_sw -domain block2 -lib_cells {<cell_list>}
create_power_switch block3_sw -domain block3 -input_supply_port {<PIN_NAME> VDD} -output_supply_port {<PIN_NAME> VDD_3} \
-control_port {<PIN_NAME> inst_always_on/pwr_ctrl} \
-on_state {<state_name> <input_pin_name> <boolean_expression>} \
-off_state {<state_name> <boolean_expression>}
map_power_switch block3_sw -domain block3 -lib_cells {<cell_list>}
## set isolation cells, default clamp value = 0
set_isolation block1_iso_out -domain block1 -isolation_power_net VDD -isolation_ground_net VSS -clamp_value 0 -applies_to outputs
set_isolation block2_iso_out -domain block2 -isolation_power_net VDD -isolation_ground_net VSS -clamp_value 0 -applies_to outputs
set_isolation block3_iso_out -domain block3 -isolation_power_net VDD -isolation_ground_net VSS -clamp_value 0 -applies_to outputs
## set exceptions for the isolation cells with clamp value = 1
set_isolation block1_iso_high_out -domain block1 -isolation_power_net VDD -isolation_ground_net VSS -clamp_value 1 -applies_to outputs -elements { \
inst_block1/output_signal1 \
inst_block1/output_signal2 \
inst_block1/output_signal3 \
inst_block1/output_signal4 }
set_isolation block3_iso_high_out -domain block3 -isolation_power_net VDD -isolation_ground_net VSS -clamp_value 1 -applies_to outputs -elements { \
inst_block3/output_signal1 \
inst_block3/output_signal2 \
inst_block3/output_signal3 \
inst_block3/output_signal4 \
inst_block3/output_signal5 \
inst_block3/output_signal6 \
inst_block3/output_signal7 \
inst_block3/output_signal8 }
## set isolation control signals for both clamp vaule 0 and clamp value 1 cells
set_isolation_control block1_iso_out -domain block1 -isolation_signal inst_always_on/block1_iso_en -isolation_sense high -location parent
set_isolation_control block1_iso_high_out -domain block1 -isolation_signal inst_always_on/block1_iso_en -isolation_sense high -location parent
set_isolation_control block1_iso_out -domain block2 -isolation_signal inst_always_on/block2_iso_en -isolation_sense high -location parent
set_isolation_control block1_iso_high_out -domain block2 -isolation_signal inst_always_on/block2_iso_en -isolation_sense high -location parent
set_isolation_control block1_iso_out -domain block3 -isolation_signal inst_always_on/block3_iso_en -isolation_sense high -location parent
set_isolation_control block1_iso_high_out -domain block3 -isolation_signal inst_always_on/block3_iso_en -isolation_sense high -location parent
## define power state on supply port
add_port_state VDD -state {on 0.81}
add_port_state block1_sw/<output_pin_name> -state {on 0.81} -state {off off}
add_port_state block2_sw/<output_pin_name> -state {on 0.81} -state {off off}
add_port_state block3_sw/<output_pin_name> -state {on 0.81} -state {off off}
add_port_state VSS -state {on 0}
#############################################
## Create PST ##
#############################################
create_pst flatten_pst -supplies {VDD VDD_1 VDD_2 VDD_3}
## all power on
add_pst_state pwr_s0 -pst flatten_pst -state { on on on on }
## block2 & block3 power off
add_pst_state pwr_s1 -pst flatten_pst -state { on on off off }
## block1 & block3 power off
add_pst_state pwr_s2 -pst flatten_pst -state { on off on off }
## block1 & block2 & block3 power off
add_pst_state pwr_s3 -pst flatten_pst -state { on off off off }
除了上面提到的内容,UPF还包含level shifter/retention/always_on_cell等单元,可以实现多电压域等更复杂的低功耗设计。此外,UPF2.0以后的版本还支持面向对象的写法,灵活度更高,不过可读性较差。UPF1.0应对一般的电源设计是足够用了。文章来源地址https://www.toymoban.com/news/detail-438144.html
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