【GreenHills】：汇编语法-Toy模板网

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汇编是编译器必经之路，任何C/C++最终都是转换成汇编，进而执行编译。
这里我们讨论如果编译器是GreenHills时，他的编译过程及相关宏。

GreenHills的汇编宏定义

文件：Davinci\Gen\Appl\Include\BrsHw.h

/**********************************************************************************************************************
 * Compiler abstraction
 *********************************************************************************************************************/
#if defined (BRS_COMP_GHS)
  #define ___asm(c)               __asm_(c)
  #define __asm_(c)               asm(" " #c);
  #define __as1(c, d)             __as1_(c, d)
  #define __as1_(c, d)            asm(" " #c " , " #d);
  #define __as2(c, d, e)          __as2_(c, d, e)
  #define __as2_(c, d, e)         asm(" " #c " , " #d " , " #e);
  #define BRS_ISR_BASE_ENTRY(x)   ___asm(jr x)
  #define BRS_ISR_ALIGNMENT       ___asm(nop)___asm(nop)___asm(nop)___asm(nop)___asm(nop)___asm(nop)
  #define BRS_ALIGN16()           asm(" .align 16");
  #define BRS_ISR_ENTRY(x)        ___asm(.word x)
  #define BRS_ISR_KEYWORD         __interrupt
  #define BRS_ISR_DEFINE(x)       _##x

  #define BRS_SECTION_CODE(c)     asm(" .section ." #c "," "ax" );
  #define BRS_GLOBAL(c)           asm(" .globl " #c);
  #define BRS_LABEL(c)            asm(#c ":");

  /* Unconditional branch to c */
  #define BRS_BRANCH(c)           ___asm(jr32 c) 

  /* Branch to e if c and d are equal */
  #define BRS_BRANCH_EQUAL(c,d,e) __as1(cmp   c, d) \
                                  ___asm(be   e)

  /* Branch to e if c and d are NOT equal */
  #define BRS_BRANCH_NOT_EQUAL(c,d,e)  __as1(cmp   c, d) \
                                       ___asm(bne   e)

/* Reads core id value (PEID) from HTCFG0 to register c. */
/* Register d is only a working register and can be reused afterwards */
# if defined (BRS_CPU_CORE_G4MH)
  #define BRS_READ_COREID(c)  __as2(stsr  0, c, 2)
# else
  #define BRS_READ_COREID(c)  __as2(stsr  0, c, 2) \
                              __as1(shr   17, c)
# endif

/* Reads architecture identifier value from PID to register c. */
/* Register d is only a working register and can be reused afterwards */
  #define BRS_READ_CORETYPE(c,d)  __as2(stsr  6, c, 1) \
                                  __as1(shr   24, c)   \
                                  __as1(mov   0xff, d) \
                                  __as1(and   d, c)

#else
  #error "Compiler not yet supported"
#endif

入口函数brsStartupEntry定义

文件：Davinci\Gen\Appl\Source\BrsHwStartup.c

/**********************************************************************************************************************
 *  INCLUDES
 *********************************************************************************************************************/
#include "BrsHw.h"
#include "BrsMain.h"
#include "vLinkGen_Lcfg.h"
/* =========================================================================== */
/*                                                                             */
/* Description: Entry point for all cores                                      */
/*                                                                             */
/* =========================================================================== */
BRS_SECTION_CODE(brsStartup)
 BRS_GLOBAL(brsStartupEntry)
BRS_LABEL(brsStartupEntry)
/*
//上面3句它等效于
.section .brsStartup ,ax
.globl brsStartupEntry
brsStartupEntry :
//含义就是，定义一个函数brsStartupEntry()存放在brsStartup字段里
....
....
/* =========================================================================== */
/* Minimal reset vector at entry address (e. g. 0x0)                           */
/* =========================================================================== */
__as1(.section ".bcode0", "ax")
BRS_ALIGN16()
BRS_BRANCH(brsStartupEntry)
___asm(nop)
___asm(nop)
___asm(nop)
BRS_ALIGN16()
 BRS_BRANCH(_BrsMainExceptionStartup)
___asm(nop)
___asm(nop)
___asm(nop)
#if (BRS_CPU_CORE_AMOUNT>1)
/* =========================================================================== */
/* Minimal reset vector at entry address (e. g. 0x0)                           */
/* =========================================================================== */
__as1(.section ".bcode1", "ax")
BRS_ALIGN16()
BRS_BRANCH(brsStartupEntry)
___asm(nop)
___asm(nop)
___asm(nop)
BRS_ALIGN16()
 BRS_BRANCH(_BrsMainExceptionStartup)
___asm(nop)
___asm(nop)
___asm(nop)
#endif /*BRS_CPU_CORE_AMOUNT>1*/
/*
上面这段汇编代码意思就是，在bcode0、bcode1字段最开始地方防止一条无条件跳转指令，跳转至brsStartupEntry
*/
*/

文件：Davinci\Gen\Appl\Source\vLinkGen_Template.ld
此文件通过Davinci vLinkGen模块自动生成，也可以自己修改。

MEMORY
{
  CODE_FLASH_CORE0_FBL : ORIGIN = 0x00000000 , LENGTH = 0x00020000 /* 128 KiB */
  BCODE0 : ORIGIN = 0x00020000 , LENGTH = 0x00000080 /* 128 Byte */
  CODE_FLASH_VERSION_CORE0 : ORIGIN = 0x00020080 , LENGTH = 0x00000080 /* 128 Byte */
  CODE_FLASH_CORE0 : ORIGIN = 0x00020100 , LENGTH = 0x0025FF00 /* 2 MiB */
  BCODE1 : ORIGIN = 0x00280000 , LENGTH = 0x00000080 /* 128 Byte */
  CODE_FLASH_CORE1 : ORIGIN = 0x00280080 , LENGTH = 0x0011FF00 /* 1 MiB */
  CODE_FLASH_A_AES128 : ORIGIN = 0x0039FF80 , LENGTH = 0x00000080 /* 128 Byte */
  CODE_FLASH_A_HSM : ORIGIN = 0x003A0000 , LENGTH = 0x00060000 /* 384 KiB */
  LOCAL_RAM_CPU1_0 : ORIGIN = 0xFDA00000 , LENGTH = 0x00010000 /* 64 KiB */
  LOCAL_RAM_CPU0_0 : ORIGIN = 0xFDC00000 , LENGTH = 0x00010000 /* 64 KiB */
  vHsmIpcMemory : ORIGIN = 0xFE000000 , LENGTH = 0x00000500 /* 1 KiB */
  vGlobalRamBuffer : ORIGIN = 0xFE000500 , LENGTH = 0x00003B00 /* 15 KiB */
  CLUSTER_RAM_0_0 : ORIGIN = 0xFE004000 , LENGTH = 0x0004BB80 /* 303 KiB */
  STACK_C0 : ORIGIN = 0xFE04FB80 , LENGTH = 0x00000400 /* 1024 Byte */
  cRAM_CoreSync : ORIGIN = 0xFE04FF80 , LENGTH = 0x00000080 /* 128 Byte */
  CLUSTER_RAM_0_TRUST : ORIGIN = 0xFE050000 , LENGTH = 0x00030000 /* 192 KiB */
  CLUSTER_RAM_2_0 : ORIGIN = 0xFE400000 , LENGTH = 0x000FFC00 /* 1023 KiB */
  STACK_C1 : ORIGIN = 0xFE4FFC00 , LENGTH = 0x00000400 /* 1024 Byte */
  MCU_DATA_FLASH : ORIGIN = 0xFF200000 , LENGTH = 0x00050000 /* 320 KiB */
  APPOB    : ORIGIN = 0xFF321380,     LENGTH = 0x80			 /* APP option bytes*/
  HSMOB    : ORIGIN = 0XFF322700,     LENGTH = 0x14			 /* HSM option bytes*/
}
SECTIONS
{
  .Startup_Code_Core0 ALIGN(4) :
  {
    *(.bcode0)
  } > BCODE0
    .Startup_Code_Core1 ALIGN(4) :
  {
    *(.bcode1)
  } > BCODE1
  .Brs_Startup_Code ALIGN(4) :
  {
    *(.brsStartup)
  } > CODE_FLASH_CORE0

  .APPOB_SECTION       align(4)             :>APPOB
  .HSMOB_SECTION       align(4)             :>HSMOB

}

通过以上Davinci\Gen\Appl\Source\BrsHwStartup.c和Davinci\Gen\Appl\Source\vLinkGen_Template.ld我们就能知道：

1、字段bcode0放在了物理Flash0x00020000上
2、字段bcode0最开始位置为一条无条件跳转指令，跳转至brsStartupEntry
3、函数brsStartupEntry放在了字段brsStartup，该字段放在了物理Flash0x00020100上

注意：
1、.ld文件中，同字段，位置靠前，则相关函数存放在物理Flash上也靠前

多核的入口地址定义

多核MCU，拿RH850 U2Ax来说，每个核的具体入口地址，则是在OptionByte中被指定：
【GreenHills】：汇编语法

结合上面的描述，我们就可以设置:
Reset Vector (PE0) = 0x00020000；也就代表核0启动时直接从此地址取指令执行。
Reset Vector (PE1) = 0x00280000；也就代表核0启动时直接从此地址取指令执行。

文件：Davinci\Gen\Appl\Source\OptionBytes.c

// referring to Table 51.50 configuration setting area for details
#define  PE0_STARTUP_ADDR			(0x20000)//size = 2432k
#define  PE1_STARTUP_ADDR			(0x280000)//size = 1152K-128

#define  OP12_DOUBLE_MAP_MODE		(0xFFFFFFFC)
#define  OP12_SINGLE_MAP_MODE   	(0xFFFFFFFD)

#define  OP3_STARTUP_USERBOOT_AREA  (0xFDFFF2FD)
#define  OP3_STARTUP_USER_AREA 		(0xFDFFF2FC)

#pragma ghs section rodata = ".APPOB_SECTION"
volatile const uint32 OptionBytes[32] = 
{
	PE0_STARTUP_ADDR			,// Reset Vector (PE0)         Shipping : 0x00000000
	PE1_STARTUP_ADDR			,// Reset Vector (PE1)         Shipping : 0x00000000 [Modified]	
	0xFFFFFFFF			,// Reset Vector (PE2)         Shipping : 0x00800000	
	0xFFFFFFFF			,// Reset Vector (PE3)         Shipping : 0x00800000	
	0xFFFFFFFF			,// Reserved                   Shipping : 0xFFFFFFFF	
	0xFFFFFFFF			,// Reserved                   Shipping : 0xFFFFFFFF	
	0xFFFFFFFF			,// Reserved                   Shipping : 0xFFFFFFFF	
	0xFFFFFFFF			,// Reserved                   Shipping : 0xFFFFFFFF	
	0x3FF20010			,// Option byte  0 (OPBT0)     Shipping : 0x3FF30010	
	0xF0FB0000			,// Option byte  1 (OPBT1)     Shipping : 0xF0FB0000	
	0xFFFFFFFF			,// Option byte  2 (OPBT2)     Shipping : 0xFFFFFFFF	
	OP3_STARTUP_USER_AREA 			,// Option byte  3 (OPBT3)     Shipping : 0xF1FFFEFE[Modified]	
	0x0C0C0C0F			,// Option byte  4 (OPBT4)     Shipping : 0x0C0C0C0F	
	0xFFFFFFFF			,// Reserved                   Shipping : 0xFFFFFFFF	
	0xFFFF0FC3			,// Option byte  6 (OPBT6)     Shipping : 0xFFFF0FC3	
	0xFFFFFFFF			,// Option byte  7 (OPBT7)     Shipping : 0xFFFFFFFF	
	0xFFFFFFFE			,// Option byte  8 (OPBT8)     Shipping : 0xFFFFFFFE	
	0xFFF1FFFF			,// Option byte  9 (OPBT9)     Shipping : 0xFFF1FFFF	
	0XF9FD288E			,// Option byte 10 (OPBT10)    Shipping : 0xFBFD288E [Modified]	main osc(A0) is 24 MHZ(0XFAFD288E), main osc(A1) is 20 MHZ(0XF9FD288E)
	0xEFFFFFFF			,// Option byte 11 (OPBT11)    Shipping : 0xFFFFFFFF [Modified]	
	OP12_DOUBLE_MAP_MODE			,// Option byte 12 (OPBT12)    Shipping : 0xFFFFFFFD [Modified]	
	0xFFFFFFFF			,// Option byte 13 (OPBT13)    Shipping : 0xFFFFFFFF	
	0x00000192			,// Option byte 14 (OPBT14)    Shipping : 0x00000192	
	0xFFFFFFFF			,// Reserved                   Shipping : 0xFFFFFFFF	
	0x6FFFFFFF			,// Option byte 16 (OPBT16)    Shipping : 0x6FFFFFFF	
	0xFFFFFFFF			,// Option byte 17 (OPBT17)    Shipping : 0xFFFFFFFF	
	0xFFFFFFFF			,// Option byte 18 (OPBT18)    Shipping : 0xFFFFFFFF	
	0xFFFFFFFF			,// Option byte 19 (OPBT19)    Shipping : 0xFFFFFFFF	
	0xF088FF00			,// Option byte 20 (OPBT20)    Shipping : 0xF088FF00	
	0x000000CC			,// Option byte 21 (OPBT21)    Shipping : 0x000000CC	
	0xC000C000			,// Option byte 22 (OPBT22)    Shipping : 0xC000C000	
	0xFFFFC000			// Option byte 23 (OPBT23)    Shipping : 0xFFFFC000	
};
#pragma ghs section rodata = default

定义OptionBytes数据，存放在字段APPOB_SECTION（物理地址：0xFF321380），通过FlashProgram烧录至MCU。
文件：xxx.hex
【GreenHills】：汇编语法

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