Consider the n-bit shift register circuit shown below:
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Write a top-level Verilog module (named top_module) for the shift register, assuming that n = 4. Instantiate four copies of your MUXDFF subcircuit in your top-level module. Assume that you are going to implement the circuit on the DE2 board.文章来源地址https://www.toymoban.com/news/detail-619306.html
- Connect the R inputs to the SW switches,
- clk to KEY[0],
- E to KEY[1],
- L to KEY[2], and
- w to KEY[3].
- Connect the outputs to the red lights LEDR[3:0].
module top_module (
input [3:0] SW,
input [3:0] KEY,
output [3:0] LEDR
); //
MUXDFF MUX_3(
.clk (KEY[0]),
.e (KEY[1]),
.l (KEY[2]),
.r (SW[3]),
.w (KEY[3]),
.Q (LEDR[3])
);
MUXDFF MUX_2(
.clk (KEY[0]),
.e (KEY[1]),
.l (KEY[2]),
.r (SW[2]),
.w (LEDR[3]),
.Q (LEDR[2])
);
MUXDFF MUX_1(
.clk (KEY[0]),
.e (KEY[1]),
.l (KEY[2]),
.r (SW[1]),
.w (LEDR[2]),
.Q (LEDR[1])
);
MUXDFF MUX_0(
.clk (KEY[0]),
.e (KEY[1]),
.l (KEY[2]),
.r (SW[0]),
.w (LEDR[1]),
.Q (LEDR[0])
);
endmodule
module MUXDFF (
input clk,
input e,
input l,
input r,
input w,
output Q
);
wire temp0;
wire temp1;
assign temp0 = e? w : Q;
assign temp1 = l? r : temp0;
always@(posedge clk)
begin
Q <= temp1;
end
endmodule
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