目录
一、 实验目的 1
二、 实验工具及环境 1
三、 实验内容及步骤 1
1、 实验2.1：16位可参数化仲裁器的设计 1
（1）补码相与法 1
（2）可变参数设计 1
2、 实验2.2：AHB总线仲裁器的设计 2
（1）设计目标 2
（2）状态机实现 3
①状态定义 3
②增量控制寄存器cnt 4
③轮询数计数器round 4
四、 实验结论及分析 5
1、 实验2.1 可变参数仲裁器的仿真验证 5
2、 实验2.2 AHB总线仲裁器的仿真验证 6
【附录】 6
1、 AHB_Arbiter_FP: 6
2、 AHB_Arbiter_RR 7
一、实验目的
学习并掌握基本的AHB总线传输协议；使用Verilog HDL语言对AHB仲裁器模块进行设计，并满足正常的时序要求，体会轮询仲裁相对于固定优先级仲裁的优越性；掌握Modelsim仿真工具的使用。
二、实验工具及环境
1.Windows 10；
2.Modelsim 10.5；
3.Vivado 20.1；
4.Visual Studio Code。
三、实验内容及步骤
1.实验2.1：16位可参数化仲裁器的设计
实验要求自选仲裁算法进行仲裁器的设计，而常见的额优先级仲裁算法有：固定优先级算法(FP，即Fixed Priority)、轮询优先级算法(RR，即Round Robin)。顾名思义，固定优先级算法就是所有主机的优先级都是固定的，优先级较低的主机只有在优先级较高的主机未请求使用总线的情况下才可以使用总线；而轮询优先级仲裁器中优先级会随着每次授权而变化，最高优先级轮转，这就避免了固定优先级仲裁器有些主机永远不可能得到授权的情况。
本次实验所设计的设定最高优先级为最低位，索引越大则优先级越低，如下表所示：
（优先级的数值越高表示优先级越高）
本次设计的重点和难点是可变参数的设计，对于一般的位宽较小的仲裁器而言，可以使用遍历所有可能的方式来实现，这样虽然重复代码量巨大导致代码冗余臃肿，但是也不失为是一种可行的办法。但是对于可变参数设计来说，就需要考虑适用于所有可能位宽的仲裁器，因此需要一种通用的算法。对于本设计而言最低为优先级最高，观察输入HBUSREQx和输出HGRANTx发现，输出独热码HGRANTx为1的位置永远是输入请求信号HBUSREQx从最低位开始第一个1，结合布尔逻辑可以联想到使用补码相与法来进行可变参数的设计。
（1）补码相与法
从布尔逻辑可以得到：一个二进制数如果与它的补码按位相与得到的结果就是最低位的1，这很符合本次设计对HBUSREQx和HGRANTx信号的要求，因此产生HGRANTx信号的代码为：
与冗长重复性遍历所有可能情况的case语句相比，补码相与法不仅节省了代码量，让设计文件变得通俗易懂、简洁灵活，而且可以满足可变参数的设计要求。
（2）可变参数设计
Verilog语法中的parameter提供了可变参数例化的设计可能性，在本次设计中使用如下(其中$clog()函数是求对数的系统函数)：
为了满足可变参数设计的需求，对于主机号HMASTER的计算则是参考了C语言中常见的独热码转二进制码的算法，使用了三维数组进行循环迭代的方法将HGRANTx二进制码转换为HMASTER二进制数，代码如下图所示：
这样的方法有多方面的弊端，最大的问题就是综合出的电路消耗大量的硬件资源，而且使用软件思维的进行硬件设计是万万不可取的，使用vivado进行综合实现后原理图如下所示。虽然综合工具进行转译、优化、映射后得到的的电路用较少的资源能够实现，但是一个好的设计更多的依靠HDL代码的质量而非综合工具。
详细代码见【附录】
2.实验2.2：AHB总线仲裁器的设计
（1）设计目标
实验2.1要求设计一个适用于AHB总线的16位仲裁器，由于固定优先级的缺点最终选择轮询仲裁器的方式来实现。仲裁器模块AHB_Arbiter中的优先级转换使用轮转的方式，即上一次授权时候优先级最高的主机在下一个授权的时候优先级降到最低，其优先级与HBUSREQx的位数关系如下表所示：
（2）状态机实现
采用三段式状态机来实现轮询仲裁器AHB_Arbiter，其状态转移图如下所示：
①状态定义
根据AHB总线协议得到仲裁器可以有三个状态：空闲状态IDLE、判断授权状态GRANT、拒绝授权状态FORBID。仲裁器在复位HRESETn为低电平的情况下回到IDLE状态，在空闲状态下判断主机的传输类型信号HTRANS，当HTRANS为IDLE或者NONSEQ的时候表明主机空闲或者只进行非连续传输，转入GRANT状态进行授权；当HTRANS为SEQ状态表明主机处于连续传输状态，转入FORBID不予授权；当HTRANS为BUSY表明主机忙，则留在IDLE等待主机请求。在GRANT和FORBID状态的时候，则会判断增量控制寄存器cnt判断主机占用总线进行突发传输是否结束，如果结束则转入GRANT状态进行下一次授权，反之则留在FORBID状态不予授权。使用独热码来实现状态定义、状态转移组合逻辑代码如下：
②增量控制寄存器cnt
由于主机占用总线进行突发传输的时候可能不止占用一个总线周期，因此需要根据HBRUST情况为主机分配4、8或16个总线周期进行传输，因此就需要计数控制。设置增量控制寄存器[4:0]cnt，其控制逻辑如下所示：
AHB_Arbiter处于IDLE状态的时候cnt赋值为缺省的2。AHB_Arbiter处于GRANT状态时根据HBRUST信号分别在四位、八位、十六位增量/回环突发的时候置为4、8、16来进行控制。AHB_Arbiter处于FORBID状态的时候cnt进行减法计数控制主机占用总线的周期数。这样就是先了不同HBRUST突发类型主机占用总线周期不同的控制。
③轮询数计数器round
由于轮询仲裁一共有16中不同的优先级组合，因此就需要设置一个计数器[3:0]round使其在不同数字的情况下选用向对应优先级，在轮询数round为0的情况下代码如下所示：
使用casex简化条件分支的代码量。在本次仲裁结束后round置数为1，进行下一种优先级的授权，代码如下：
在本次仲裁结束后round置数为1，进行下一种优先级的授权，其他round以此类推。通过这种方法就能够实现16位轮询仲裁器AHB_Arbiter，详细代码见【附录】。
四、实验结论及分析
1.实验2.1 可变参数仲裁器的仿真验证
为了验证可变参数仲裁器功能的正确性，实例化一个8位的固定优先级仲裁器来仿真验证通过系统函数$random($time)来随机产生HBUSREQx请求信号，波形如下所示：
通过观察得到当优先级较高的主机发出请求时，优先级较低的主机是否请求仲裁器都会有限授权高优先级的主机使用总线，仿真功能正确
2.实验2.2 AHB总线仲裁器的仿真验证
将HBURSTx恒置位为16’hffff，即同时所有主机都请求，其仿真结果如下图所示：
文章来源：https://www.toymoban.com/news/detail-694022.html
观察得到，仲裁器授权信号HGRANTx和主机号HMASTER之在当前主机占用结束之后会发生变化，不存在一个主机一直使用总线的情况。当HBURST为八位增量突发的时候，授权信号HGRANTx和主机号HMASTER持续连续八个周期；当HBURST为十六位增量突发的时候，授权信号HGRANTx和主机号HMASTER持续连续十六个周期，这表明仲裁器能够根据突发类型HBURST来授予主机不同的使用总线的周期，仿真功能正确。文章来源地址https://www.toymoban.com/news/detail-694022.html
【附录】
1.AHB_Arbiter_FP:
module AHB_Arbiter_FP #(
parameter REQ_WIDTH = 16,
parameter BIN_WIDTH = $clog2(REQ_WIDTH)
)(
input HCLK,//总线时钟
input HRESETn,//总线复位
input [REQ_WIDTH-1:0]HBUSREQx,//总线请求 独热码
input [1:0]HTRANS,//传输类型
input [2:0]HBURST,//突发类型
input HREADY,//传输完成
output [BIN_WIDTH-1:0]HMASTER,//主机号
output [REQ_WIDTH-1:0]HGRANTx//总线授予最终使用总线的主机号独热码
);
/*-------------------------------------------------------------
使用Fixed Priority固定优先级算法实现可变参数AHB总线仲裁器
低位请求优先级更高
-------------------------------------------------------------*/
//补码相与法:二进制数与其补码与得到独热码
assign HGRANTx = {1'b1,HBUSREQx} & (~({1'b1,HBUSREQx} - 1));
//独热码转二进制码
localparam or_element_number = REQ_WIDTH>>1;
wire [REQ_WIDTH-1:0]or_bit[BIN_WIDTH-1:0][or_element_number-1:0];
wire [BIN_WIDTH-1:0]bin_code_temp;
genvar i,j,k;
for(i=0;i<BIN_WIDTH;i=i+1) begin : loop_1
for (j=0; j<or_element_number; j=j+1) begin : loop_2
for(k=0;k<REQ_WIDTH;k=k+1) begin :loop_3
if(k%(2**(i+1))<(2**(i))) begin
assign or_bit[i][j][k] = HGRANTx[k];
end
else begin
assign or_bit[i][j][k] = 1'b0;
end
end
assign bin_code_temp[i] = ~|(or_bit[i][j]);
end
end
assign HMASTER = bin_code_temp;
endmodule2.AHB_Arbiter_RR
module AHB_Arbiter_RR(
input HCLK,//总线时钟
input HRESETn,//总线复位
input [15:0]HBUSREQx,//总线请求 最多16个主机挂载 独热码
input [1:0]HTRANS,//传输类型
input [2:0]HBURST,//突发类型 决定主机占用时间
input HREADY,//传输完成
output reg [3:0]HMASTER,//主机号
output reg [15:0]HGRANTx//总线授予最终使用总线的主机号独热码
);
/*-------------------------------------------------------------
使用Round Robin轮询调度算法实现可变参数AHB总线仲裁器
优先级轮转，当一个主机被授予总线使用权之后其优先级降到最低(屏蔽掉)
-------------------------------------------------------------*/
//传输类型参数定义
parameter HTRANS_IDLE = 2'b00;//空闲
parameter HTRANS_BUSY = 2'b01;//忙
parameter HTRANS_NONSEQ = 2'b10;//非连续
parameter HTRANS_SEQ = 2'b11;//连续
//突发类型参数定义
parameter HBURST_SINGLE = 3'b000;//单一传输
parameter HBURST_INCR = 3'b001;//未指定长度的增量突发
parameter HBURST_WRAP4 = 3'b010;//4拍回环突发
parameter HBURST_INCR4 = 3'b011;//4拍增量突发
parameter HBURST_WRAP8 = 3'b100;//8拍回环突发
parameter HBURST_INCR8 = 3'b101;//8拍增量突发
parameter HBURST_WRAP16 = 3'b110;//16拍回环突发
parameter HBURST_INCR16 = 3'b111;//16拍增量突发
//状态参数定义
localparam IDLE = 3'b001;
localparam GRANT = 3'b010;
localparam FORBID = 3'b100;
//寄存器定义
reg [2:0]cstate,nstate;
reg [4:0]cnt;//增量控制寄存器
reg [3:0]round=4'd0;//优先级循环寄存器
//增量控制寄存器
always@(posedge HCLK or negedge HRESETn)begin
if(!HRESETn)begin
cnt <= 5'd0;
end
else begin
case(cstate)
IDLE:cnt <= 5'd2;
GRANT:begin
case(HBURST)
HBURST_SINGLE:cnt <= 5'd1; //单一传输
HBURST_INCR: cnt <= 5'd1; //未指定长度的增量突发
HBURST_WRAP4: cnt <= 5'd4; //4拍回环突发
HBURST_INCR4: cnt <= 5'd4; //4拍增量突发
HBURST_WRAP8: cnt <= 5'd8; //8拍回环突发
HBURST_INCR8: cnt <= 5'd8; //8拍增量突发
HBURST_WRAP16:cnt <= 5'd16;//16拍回环突发
HBURST_INCR16:cnt <= 5'd16;//16拍增量突发
endcase
end
FORBID:begin
if(cnt >= 5'd2)begin
cnt <= cnt - 5'd1;//每一拍减少一次
end
else begin
cnt <= 5'd2;
end
end
endcase
end
end
//状态转移同步逻辑
always@(posedge HCLK or negedge HRESETn)begin
if(!HRESETn)begin
cstate <= IDLE;
end
else begin
cstate <= nstate;
end
end
//产生下一个状态组合逻辑
always@(*)begin
if(!HRESETn)begin
nstate = IDLE;
end
else begin
case(cstate)
IDLE:begin
case(HTRANS)
HTRANS_IDLE:nstate = GRANT;
HTRANS_BUSY:nstate = IDLE;
HTRANS_NONSEQ:nstate= GRANT;
HTRANS_SEQ:nstate = FORBID;
endcase
end
GRANT:begin
nstate = (cnt == 5'd2)?GRANT:FORBID;
end
FORBID:begin
nstate = (cnt == 5'd2)?GRANT:FORBID;
end
default:nstate = IDLE;
endcase
end
end
//产生输出组合逻辑:根据round分配优先级
always@(*)begin
case(cstate)
IDLE:begin
HMASTER = 4'd0;
HGRANTx = 16'd0;
end
GRANT:begin
case(round)
4'd0: begin//优先级(1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16)
casex(HBUSREQx)
16'bxxxx_xxxx_xxxx_xxx1:begin HMASTER = 4'd0; HGRANTx = 16'h0001; end
16'bxxxx_xxxx_xxxx_xx10:begin HMASTER = 4'd1; HGRANTx = 16'h0002; end
16'bxxxx_xxxx_xxxx_x100:begin HMASTER = 4'd2; HGRANTx = 16'h0004; end
16'bxxxx_xxxx_xxxx_1000:begin HMASTER = 4'd3; HGRANTx = 16'h0008; end
16'bxxxx_xxxx_xxx1_0000:begin HMASTER = 4'd4; HGRANTx = 16'h0010; end
16'bxxxx_xxxx_xx10_0000:begin HMASTER = 4'd5; HGRANTx = 16'h0020; end
16'bxxxx_xxxx_x100_0000:begin HMASTER = 4'd6; HGRANTx = 16'h0040; end
16'bxxxx_xxxx_1000_0000:begin HMASTER = 4'd7; HGRANTx = 16'h0080; end
16'bxxxx_xxx1_0000_0000:begin HMASTER = 4'd8; HGRANTx = 16'h0100; end
16'bxxxx_xx10_0000_0000:begin HMASTER = 4'd9; HGRANTx = 16'h0200; end
16'bxxxx_x100_0000_0000:begin HMASTER = 4'd10;HGRANTx = 16'h0400; end
16'bxxxx_1000_0000_0000:begin HMASTER = 4'd11;HGRANTx = 16'h0800; end
16'bxxx1_0000_0000_0000:begin HMASTER = 4'd12;HGRANTx = 16'h1000; end
16'bxx10_0000_0000_0000:begin HMASTER = 4'd13;HGRANTx = 16'h2000; end
16'bx100_0000_0000_0000:begin HMASTER = 4'd14;HGRANTx = 16'h4000; end
16'b1000_0000_0000_0000:begin HMASTER = 4'd15;HGRANTx = 16'h8000; end
endcase
round = 4'd1;
end
4'd1: begin//优先级(2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,1)
casex(HBUSREQx)
16'bxxxx_xxxx_xxxx_xx1x:begin HMASTER = 4'd1; HGRANTx = 16'h0002; end
16'bxxxx_xxxx_xxxx_x10x:begin HMASTER = 4'd2; HGRANTx = 16'h0004; end
16'bxxxx_xxxx_xxxx_100x:begin HMASTER = 4'd3; HGRANTx = 16'h0008; end
16'bxxxx_xxxx_xxx1_000x:begin HMASTER = 4'd4; HGRANTx = 16'h0010; end
16'bxxxx_xxxx_xx10_000x:begin HMASTER = 4'd5; HGRANTx = 16'h0020; end
16'bxxxx_xxxx_x100_000x:begin HMASTER = 4'd6; HGRANTx = 16'h0040; end
16'bxxxx_xxxx_1000_000x:begin HMASTER = 4'd7; HGRANTx = 16'h0080; end
16'bxxxx_xxx1_0000_000x:begin HMASTER = 4'd8; HGRANTx = 16'h0100; end
16'bxxxx_xx10_0000_000x:begin HMASTER = 4'd9; HGRANTx = 16'h0200; end
16'bxxxx_x100_0000_000x:begin HMASTER = 4'd10;HGRANTx = 16'h0400; end
16'bxxxx_1000_0000_000x:begin HMASTER = 4'd11;HGRANTx = 16'h0800; end
16'bxxx1_0000_0000_000x:begin HMASTER = 4'd12;HGRANTx = 16'h1000; end
16'bxx10_0000_0000_000x:begin HMASTER = 4'd13;HGRANTx = 16'h2000; end
16'bx100_0000_0000_000x:begin HMASTER = 4'd14;HGRANTx = 16'h4000; end
16'b1000_0000_0000_000x:begin HMASTER = 4'd15;HGRANTx = 16'h8000; end
16'bxxxx_xxxx_xxxx_xxx1:begin HMASTER = 4'd0; HGRANTx = 16'h0001; end
endcase
round = 4'd2;
end
4'd2: begin//优先级(3,4,5,6,7,8,9,10,11,12,13,14,15,16,1,2)
casex(HBUSREQx)
16'bxxxx_xxxx_xxxx_x1xx:begin HMASTER = 4'd2; HGRANTx = 16'h0004; end
16'bxxxx_xxxx_xxxx_10xx:begin HMASTER = 4'd3; HGRANTx = 16'h0008; end
16'bxxxx_xxxx_xxx1_00xx:begin HMASTER = 4'd4; HGRANTx = 16'h0010; end
16'bxxxx_xxxx_xx10_00xx:begin HMASTER = 4'd5; HGRANTx = 16'h0020; end
16'bxxxx_xxxx_x100_00xx:begin HMASTER = 4'd6; HGRANTx = 16'h0040; end
16'bxxxx_xxxx_1000_00xx:begin HMASTER = 4'd7; HGRANTx = 16'h0080; end
16'bxxxx_xxx1_0000_00xx:begin HMASTER = 4'd8; HGRANTx = 16'h0100; end
16'bxxxx_xx10_0000_00xx:begin HMASTER = 4'd9; HGRANTx = 16'h0200; end
16'bxxxx_x100_0000_00xx:begin HMASTER = 4'd10;HGRANTx = 16'h0400; end
16'bxxxx_1000_0000_00xx:begin HMASTER = 4'd11;HGRANTx = 16'h0800; end
16'bxxx1_0000_0000_00xx:begin HMASTER = 4'd12;HGRANTx = 16'h1000; end
16'bxx10_0000_0000_00xx:begin HMASTER = 4'd13;HGRANTx = 16'h2000; end
16'bx100_0000_0000_00xx:begin HMASTER = 4'd14;HGRANTx = 16'h4000; end
16'b1000_0000_0000_00xx:begin HMASTER = 4'd15;HGRANTx = 16'h8000; end
16'bxxxx_xxxx_xxxx_xxx1:begin HMASTER = 4'd0; HGRANTx = 16'h0001; end
16'bxxxx_xxxx_xxxx_xx10:begin HMASTER = 4'd1; HGRANTx = 16'h0002; end
endcase
round = 4'd3;
end
4'd3: begin//优先级(4,5,6,7,8,9,10,11,12,13,14,15,16,1,2,3)
casex(HBUSREQx)
16'bxxxx_xxxx_xxxx_1xxx:begin HMASTER = 4'd3; HGRANTx = 16'h0008; end
16'bxxxx_xxxx_xxx1_0xxx:begin HMASTER = 4'd4; HGRANTx = 16'h0010; end
16'bxxxx_xxxx_xx10_0xxx:begin HMASTER = 4'd5; HGRANTx = 16'h0020; end
16'bxxxx_xxxx_x100_0xxx:begin HMASTER = 4'd6; HGRANTx = 16'h0040; end
16'bxxxx_xxxx_1000_0xxx:begin HMASTER = 4'd7; HGRANTx = 16'h0080; end
16'bxxxx_xxx1_0000_0xxx:begin HMASTER = 4'd8; HGRANTx = 16'h0100; end
16'bxxxx_xx10_0000_0xxx:begin HMASTER = 4'd9; HGRANTx = 16'h0200; end
16'bxxxx_x100_0000_0xxx:begin HMASTER = 4'd10;HGRANTx = 16'h0400; end
16'bxxxx_1000_0000_0xxx:begin HMASTER = 4'd11;HGRANTx = 16'h0800; end
16'bxxx1_0000_0000_0xxx:begin HMASTER = 4'd12;HGRANTx = 16'h1000; end
16'bxx10_0000_0000_0xxx:begin HMASTER = 4'd13;HGRANTx = 16'h2000; end
16'bx100_0000_0000_0xxx:begin HMASTER = 4'd14;HGRANTx = 16'h4000; end
16'b1000_0000_0000_0xxx:begin HMASTER = 4'd15;HGRANTx = 16'h8000; end
16'bxxxx_xxxx_xxxx_xxx1:begin HMASTER = 4'd0; HGRANTx = 16'h0001; end
16'bxxxx_xxxx_xxxx_xx10:begin HMASTER = 4'd1; HGRANTx = 16'h0002; end
16'bxxxx_xxxx_xxxx_x100:begin HMASTER = 4'd2; HGRANTx = 16'h0004; end
endcase
round = 4'd4;
end
4'd4: begin//优先级(5,6,7,8,9,10,11,12,13,14,15,16,1,2,3,4)
casex(HBUSREQx)
16'bxxxx_xxxx_xxx1_xxxx:begin HMASTER = 4'd4; HGRANTx = 16'h0010; end
16'bxxxx_xxxx_xx10_xxxx:begin HMASTER = 4'd5; HGRANTx = 16'h0020; end
16'bxxxx_xxxx_x100_xxxx:begin HMASTER = 4'd6; HGRANTx = 16'h0040; end
16'bxxxx_xxxx_1000_xxxx:begin HMASTER = 4'd7; HGRANTx = 16'h0080; end
16'bxxxx_xxx1_0000_xxxx:begin HMASTER = 4'd8; HGRANTx = 16'h0100; end
16'bxxxx_xx10_0000_xxxx:begin HMASTER = 4'd9; HGRANTx = 16'h0200; end
16'bxxxx_x100_0000_xxxx:begin HMASTER = 4'd10;HGRANTx = 16'h0400; end
16'bxxxx_1000_0000_xxxx:begin HMASTER = 4'd11;HGRANTx = 16'h0800; end
16'bxxx1_0000_0000_xxxx:begin HMASTER = 4'd12;HGRANTx = 16'h1000; end
16'bxx10_0000_0000_xxxx:begin HMASTER = 4'd13;HGRANTx = 16'h2000; end
16'bx100_0000_0000_xxxx:begin HMASTER = 4'd14;HGRANTx = 16'h4000; end
16'b1000_0000_0000_xxxx:begin HMASTER = 4'd15;HGRANTx = 16'h8000; end
16'bxxxx_xxxx_xxxx_xxx1:begin HMASTER = 4'd0; HGRANTx = 16'h0001; end
16'bxxxx_xxxx_xxxx_xx10:begin HMASTER = 4'd1; HGRANTx = 16'h0002; end
16'bxxxx_xxxx_xxxx_x100:begin HMASTER = 4'd2; HGRANTx = 16'h0004; end
16'bxxxx_xxxx_xxxx_1000:begin HMASTER = 4'd3; HGRANTx = 16'h0008; end
endcase
round = 4'd5;
end
4'd5: begin//优先级(6,7,8,9,10,11,12,13,14,15,16,1,2,3,4,5)
casex(HBUSREQx)
16'bxxxx_xxxx_xx1x_xxxx:begin HMASTER = 4'd5; HGRANTx = 16'h0020; end
16'bxxxx_xxxx_x10x_xxxx:begin HMASTER = 4'd6; HGRANTx = 16'h0040; end
16'bxxxx_xxxx_100x_xxxx:begin HMASTER = 4'd7; HGRANTx = 16'h0080; end
16'bxxxx_xxx1_000x_xxxx:begin HMASTER = 4'd8; HGRANTx = 16'h0100; end
16'bxxxx_xx10_000x_xxxx:begin HMASTER = 4'd9; HGRANTx = 16'h0200; end
16'bxxxx_x100_000x_xxxx:begin HMASTER = 4'd10;HGRANTx = 16'h0400; end
16'bxxxx_1000_000x_xxxx:begin HMASTER = 4'd11;HGRANTx = 16'h0800; end
16'bxxx1_0000_000x_xxxx:begin HMASTER = 4'd12;HGRANTx = 16'h1000; end
16'bxx10_0000_000x_xxxx:begin HMASTER = 4'd13;HGRANTx = 16'h2000; end
16'bx100_0000_000x_xxxx:begin HMASTER = 4'd14;HGRANTx = 16'h4000; end
16'b1000_0000_000x_xxxx:begin HMASTER = 4'd15;HGRANTx = 16'h8000; end
16'bxxxx_xxxx_xxxx_xxx1:begin HMASTER = 4'd0; HGRANTx = 16'h0001; end
16'bxxxx_xxxx_xxxx_xx10:begin HMASTER = 4'd1; HGRANTx = 16'h0002; end
16'bxxxx_xxxx_xxxx_x100:begin HMASTER = 4'd2; HGRANTx = 16'h0004; end
16'bxxxx_xxxx_xxxx_1000:begin HMASTER = 4'd3; HGRANTx = 16'h0008; end
16'bxxxx_xxxx_xxx1_0000:begin HMASTER = 4'd4; HGRANTx = 16'h0010; end
endcase
round = 4'd6;
end
4'd6: begin//优先级(7,8,9,10,11,12,13,14,15,16,1,2,3,4,5,6)
casex(HBUSREQx)
16'bxxxx_xxxx_x1xx_xxxx:begin HMASTER = 4'd6; HGRANTx = 16'h0040; end
16'bxxxx_xxxx_10xx_xxxx:begin HMASTER = 4'd7; HGRANTx = 16'h0080; end
16'bxxxx_xxx1_00xx_xxxx:begin HMASTER = 4'd8; HGRANTx = 16'h0100; end
16'bxxxx_xx10_00xx_xxxx:begin HMASTER = 4'd9; HGRANTx = 16'h0200; end
16'bxxxx_x100_00xx_xxxx:begin HMASTER = 4'd10;HGRANTx = 16'h0400; end
16'bxxxx_1000_00xx_xxxx:begin HMASTER = 4'd11;HGRANTx = 16'h0800; end
16'bxxx1_0000_00xx_xxxx:begin HMASTER = 4'd12;HGRANTx = 16'h1000; end
16'bxx10_0000_00xx_xxxx:begin HMASTER = 4'd13;HGRANTx = 16'h2000; end
16'bx100_0000_00xx_xxxx:begin HMASTER = 4'd14;HGRANTx = 16'h4000; end
16'b1000_0000_00xx_xxxx:begin HMASTER = 4'd15;HGRANTx = 16'h8000; end
16'bxxxx_xxxx_xxxx_xxx1:begin HMASTER = 4'd0; HGRANTx = 16'h0001; end
16'bxxxx_xxxx_xxxx_xx10:begin HMASTER = 4'd1; HGRANTx = 16'h0002; end
16'bxxxx_xxxx_xxxx_x100:begin HMASTER = 4'd2; HGRANTx = 16'h0004; end
16'bxxxx_xxxx_xxxx_1000:begin HMASTER = 4'd3; HGRANTx = 16'h0008; end
16'bxxxx_xxxx_xxx1_0000:begin HMASTER = 4'd4; HGRANTx = 16'h0010; end
16'bxxxx_xxxx_xx10_0000:begin HMASTER = 4'd5; HGRANTx = 16'h0020; end
endcase
round = 4'd7;
end
4'd7: begin//优先级(8,9,10,11,12,13,14,15,16,1,2,3,4,5,6,7)
casex(HBUSREQx)
16'bxxxx_xxxx_1xxx_xxxx:begin HMASTER = 4'd7; HGRANTx = 16'h0080; end
16'bxxxx_xxx1_0xxx_xxxx:begin HMASTER = 4'd8; HGRANTx = 16'h0100; end
16'bxxxx_xx10_0xxx_xxxx:begin HMASTER = 4'd9; HGRANTx = 16'h0200; end
16'bxxxx_x100_0xxx_xxxx:begin HMASTER = 4'd10;HGRANTx = 16'h0400; end
16'bxxxx_1000_0xxx_xxxx:begin HMASTER = 4'd11;HGRANTx = 16'h0800; end
16'bxxx1_0000_0xxx_xxxx:begin HMASTER = 4'd12;HGRANTx = 16'h1000; end
16'bxx10_0000_0xxx_xxxx:begin HMASTER = 4'd13;HGRANTx = 16'h2000; end
16'bx100_0000_0xxx_xxxx:begin HMASTER = 4'd14;HGRANTx = 16'h4000; end
16'b1000_0000_0xxx_xxxx:begin HMASTER = 4'd15;HGRANTx = 16'h8000; end
16'bxxxx_xxxx_xxxx_xxx1:begin HMASTER = 4'd0; HGRANTx = 16'h0001; end
16'bxxxx_xxxx_xxxx_xx10:begin HMASTER = 4'd1; HGRANTx = 16'h0002; end
16'bxxxx_xxxx_xxxx_x100:begin HMASTER = 4'd2; HGRANTx = 16'h0004; end
16'bxxxx_xxxx_xxxx_1000:begin HMASTER = 4'd3; HGRANTx = 16'h0008; end
16'bxxxx_xxxx_xxx1_0000:begin HMASTER = 4'd4; HGRANTx = 16'h0010; end
16'bxxxx_xxxx_xx10_0000:begin HMASTER = 4'd5; HGRANTx = 16'h0020; end
16'bxxxx_xxxx_x100_0000:begin HMASTER = 4'd6; HGRANTx = 16'h0040; end
endcase
round = 4'd8;
end
4'd8: begin//优先级(9,10,11,12,13,14,15,16,1,2,3,4,5,6,7,8)
casex(HBUSREQx)
16'bxxxx_xxx1_xxxx_xxxx:begin HMASTER = 4'd8; HGRANTx = 16'h0100; end
16'bxxxx_xx10_xxxx_xxxx:begin HMASTER = 4'd9; HGRANTx = 16'h0200; end
16'bxxxx_x100_xxxx_xxxx:begin HMASTER = 4'd10;HGRANTx = 16'h0400; end
16'bxxxx_1000_xxxx_xxxx:begin HMASTER = 4'd11;HGRANTx = 16'h0800; end
16'bxxx1_0000_xxxx_xxxx:begin HMASTER = 4'd12;HGRANTx = 16'h1000; end
16'bxx10_0000_xxxx_xxxx:begin HMASTER = 4'd13;HGRANTx = 16'h2000; end
16'bx100_0000_xxxx_xxxx:begin HMASTER = 4'd14;HGRANTx = 16'h4000; end
16'b1000_0000_xxxx_xxxx:begin HMASTER = 4'd15;HGRANTx = 16'h8000; end
16'bxxxx_xxxx_xxxx_xxx1:begin HMASTER = 4'd0; HGRANTx = 16'h0001; end
16'bxxxx_xxxx_xxxx_xx10:begin HMASTER = 4'd1; HGRANTx = 16'h0002; end
16'bxxxx_xxxx_xxxx_x100:begin HMASTER = 4'd2; HGRANTx = 16'h0004; end
16'bxxxx_xxxx_xxxx_1000:begin HMASTER = 4'd3; HGRANTx = 16'h0008; end
16'bxxxx_xxxx_xxx1_0000:begin HMASTER = 4'd4; HGRANTx = 16'h0010; end
16'bxxxx_xxxx_xx10_0000:begin HMASTER = 4'd5; HGRANTx = 16'h0020; end
16'bxxxx_xxxx_x100_0000:begin HMASTER = 4'd6; HGRANTx = 16'h0040; end
16'bxxxx_xxxx_1000_0000:begin HMASTER = 4'd7; HGRANTx = 16'h0080; end
endcase
round = 4'd9;
end
4'd9: begin//优先级(10,11,12,13,14,15,16,1,2,3,4,5,6,7,8,9)
casex(HBUSREQx)
16'bxxxx_xx1x_xxxx_xxxx:begin HMASTER = 4'd9; HGRANTx = 16'h0200; end
16'bxxxx_x10x_xxxx_xxxx:begin HMASTER = 4'd10;HGRANTx = 16'h0400; end
16'bxxxx_100x_xxxx_xxxx:begin HMASTER = 4'd11;HGRANTx = 16'h0800; end
16'bxxx1_000x_xxxx_xxxx:begin HMASTER = 4'd12;HGRANTx = 16'h1000; end
16'bxx10_000x_xxxx_xxxx:begin HMASTER = 4'd13;HGRANTx = 16'h2000; end
16'bx100_000x_xxxx_xxxx:begin HMASTER = 4'd14;HGRANTx = 16'h4000; end
16'b1000_000x_xxxx_xxxx:begin HMASTER = 4'd15;HGRANTx = 16'h8000; end
16'bxxxx_xxxx_xxxx_xxx1:begin HMASTER = 4'd0; HGRANTx = 16'h0001; end
16'bxxxx_xxxx_xxxx_xx10:begin HMASTER = 4'd1; HGRANTx = 16'h0002; end
16'bxxxx_xxxx_xxxx_x100:begin HMASTER = 4'd2; HGRANTx = 16'h0004; end
16'bxxxx_xxxx_xxxx_1000:begin HMASTER = 4'd3; HGRANTx = 16'h0008; end
16'bxxxx_xxxx_xxx1_0000:begin HMASTER = 4'd4; HGRANTx = 16'h0010; end
16'bxxxx_xxxx_xx10_0000:begin HMASTER = 4'd5; HGRANTx = 16'h0020; end
16'bxxxx_xxxx_x100_0000:begin HMASTER = 4'd6; HGRANTx = 16'h0040; end
16'bxxxx_xxxx_1000_0000:begin HMASTER = 4'd7; HGRANTx = 16'h0080; end
16'bxxxx_xxx1_0000_0000:begin HMASTER = 4'd8; HGRANTx = 16'h0100; end
endcase
round = 4'd10;
end
4'd10:begin//优先级(11,12,13,14,15,16,1,2,3,4,5,6,7,8,9,10)
casex(HBUSREQx)
16'bxxxx_x1xx_xxxx_xxxx:begin HMASTER = 4'd10;HGRANTx = 16'h0400; end
16'bxxxx_10xx_xxxx_xxxx:begin HMASTER = 4'd11;HGRANTx = 16'h0800; end
16'bxxx1_00xx_xxxx_xxxx:begin HMASTER = 4'd12;HGRANTx = 16'h1000; end
16'bxx10_00xx_xxxx_xxxx:begin HMASTER = 4'd13;HGRANTx = 16'h2000; end
16'bx100_00xx_xxxx_xxxx:begin HMASTER = 4'd14;HGRANTx = 16'h4000; end
16'b1000_00xx_xxxx_xxxx:begin HMASTER = 4'd15;HGRANTx = 16'h8000; end
16'bxxxx_xxxx_xxxx_xxx1:begin HMASTER = 4'd0; HGRANTx = 16'h0001; end
16'bxxxx_xxxx_xxxx_xx10:begin HMASTER = 4'd1; HGRANTx = 16'h0002; end
16'bxxxx_xxxx_xxxx_x100:begin HMASTER = 4'd2; HGRANTx = 16'h0004; end
16'bxxxx_xxxx_xxxx_1000:begin HMASTER = 4'd3; HGRANTx = 16'h0008; end
16'bxxxx_xxxx_xxx1_0000:begin HMASTER = 4'd4; HGRANTx = 16'h0010; end
16'bxxxx_xxxx_xx10_0000:begin HMASTER = 4'd5; HGRANTx = 16'h0020; end
16'bxxxx_xxxx_x100_0000:begin HMASTER = 4'd6; HGRANTx = 16'h0040; end
16'bxxxx_xxxx_1000_0000:begin HMASTER = 4'd7; HGRANTx = 16'h0080; end
16'bxxxx_xxx1_0000_0000:begin HMASTER = 4'd8; HGRANTx = 16'h0100; end
16'bxxxx_xx10_0000_0000:begin HMASTER = 4'd9; HGRANTx = 16'h0200; end
endcase
round = 4'd11;
end
4'd11:begin//优先级(12,13,14,15,16,1,2,3,4,5,6,7,8,9,10,11)
casex(HBUSREQx)
16'bxxxx_1xxx_xxxx_xxxx:begin HMASTER = 4'd11;HGRANTx = 16'h0800; end
16'bxxx1_0xxx_xxxx_xxxx:begin HMASTER = 4'd12;HGRANTx = 16'h1000; end
16'bxx10_0xxx_xxxx_xxxx:begin HMASTER = 4'd13;HGRANTx = 16'h2000; end
16'bx100_0xxx_xxxx_xxxx:begin HMASTER = 4'd14;HGRANTx = 16'h4000; end
16'b1000_0xxx_xxxx_xxxx:begin HMASTER = 4'd15;HGRANTx = 16'h8000; end
16'bxxxx_xxxx_xxxx_xxx1:begin HMASTER = 4'd0; HGRANTx = 16'h0001; end
16'bxxxx_xxxx_xxxx_xx10:begin HMASTER = 4'd1; HGRANTx = 16'h0002; end
16'bxxxx_xxxx_xxxx_x100:begin HMASTER = 4'd2; HGRANTx = 16'h0004; end
16'bxxxx_xxxx_xxxx_1000:begin HMASTER = 4'd3; HGRANTx = 16'h0008; end
16'bxxxx_xxxx_xxx1_0000:begin HMASTER = 4'd4; HGRANTx = 16'h0010; end
16'bxxxx_xxxx_xx10_0000:begin HMASTER = 4'd5; HGRANTx = 16'h0020; end
16'bxxxx_xxxx_x100_0000:begin HMASTER = 4'd6; HGRANTx = 16'h0040; end
16'bxxxx_xxxx_1000_0000:begin HMASTER = 4'd7; HGRANTx = 16'h0080; end
16'bxxxx_xxx1_0000_0000:begin HMASTER = 4'd8; HGRANTx = 16'h0100; end
16'bxxxx_xx10_0000_0000:begin HMASTER = 4'd9; HGRANTx = 16'h0200; end
16'bxxxx_x100_0000_0000:begin HMASTER = 4'd10;HGRANTx = 16'h0400; end
endcase
round = 4'd12;
end
4'd12:begin//优先级(13,14,15,16,1,2,3,4,5,6,7,8,9,10,11,12)
casex(HBUSREQx)
16'bxxx1_xxxx_xxxx_xxxx:begin HMASTER = 4'd12;HGRANTx = 16'h1000; end
16'bxx10_xxxx_xxxx_xxxx:begin HMASTER = 4'd13;HGRANTx = 16'h2000; end
16'bx100_xxxx_xxxx_xxxx:begin HMASTER = 4'd14;HGRANTx = 16'h4000; end
16'b1000_xxxx_xxxx_xxxx:begin HMASTER = 4'd15;HGRANTx = 16'h8000; end
16'bxxxx_xxxx_xxxx_xxx1:begin HMASTER = 4'd0; HGRANTx = 16'h0001; end
16'bxxxx_xxxx_xxxx_xx10:begin HMASTER = 4'd1; HGRANTx = 16'h0002; end
16'bxxxx_xxxx_xxxx_x100:begin HMASTER = 4'd2; HGRANTx = 16'h0004; end
16'bxxxx_xxxx_xxxx_1000:begin HMASTER = 4'd3; HGRANTx = 16'h0008; end
16'bxxxx_xxxx_xxx1_0000:begin HMASTER = 4'd4; HGRANTx = 16'h0010; end
16'bxxxx_xxxx_xx10_0000:begin HMASTER = 4'd5; HGRANTx = 16'h0020; end
16'bxxxx_xxxx_x100_0000:begin HMASTER = 4'd6; HGRANTx = 16'h0040; end
16'bxxxx_xxxx_1000_0000:begin HMASTER = 4'd7; HGRANTx = 16'h0080; end
16'bxxxx_xxx1_0000_0000:begin HMASTER = 4'd8; HGRANTx = 16'h0100; end
16'bxxxx_xx10_0000_0000:begin HMASTER = 4'd9; HGRANTx = 16'h0200; end
16'bxxxx_x100_0000_0000:begin HMASTER = 4'd10;HGRANTx = 16'h0400; end
16'bxxxx_1000_0000_0000:begin HMASTER = 4'd11;HGRANTx = 16'h0800; end
endcase
round = 4'd13;
end
4'd13:begin//优先级(14,15,16,1,2,3,4,5,6,7,8,9,10,11,12,13)
casex(HBUSREQx)
16'bxx1x_xxxx_xxxx_xxxx:begin HMASTER = 4'd13;HGRANTx = 16'h2000; end
16'bx10x_xxxx_xxxx_xxxx:begin HMASTER = 4'd14;HGRANTx = 16'h4000; end
16'b100x_xxxx_xxxx_xxxx:begin HMASTER = 4'd15;HGRANTx = 16'h8000; end
16'bxxxx_xxxx_xxxx_xxx1:begin HMASTER = 4'd0; HGRANTx = 16'h0001; end
16'bxxxx_xxxx_xxxx_xx10:begin HMASTER = 4'd1; HGRANTx = 16'h0002; end
16'bxxxx_xxxx_xxxx_x100:begin HMASTER = 4'd2; HGRANTx = 16'h0004; end
16'bxxxx_xxxx_xxxx_1000:begin HMASTER = 4'd3; HGRANTx = 16'h0008; end
16'bxxxx_xxxx_xxx1_0000:begin HMASTER = 4'd4; HGRANTx = 16'h0010; end
16'bxxxx_xxxx_xx10_0000:begin HMASTER = 4'd5; HGRANTx = 16'h0020; end
16'bxxxx_xxxx_x100_0000:begin HMASTER = 4'd6; HGRANTx = 16'h0040; end
16'bxxxx_xxxx_1000_0000:begin HMASTER = 4'd7; HGRANTx = 16'h0080; end
16'bxxxx_xxx1_0000_0000:begin HMASTER = 4'd8; HGRANTx = 16'h0100; end
16'bxxxx_xx10_0000_0000:begin HMASTER = 4'd9; HGRANTx = 16'h0200; end
16'bxxxx_x100_0000_0000:begin HMASTER = 4'd10;HGRANTx = 16'h0400; end
16'bxxxx_1000_0000_0000:begin HMASTER = 4'd11;HGRANTx = 16'h0800; end
16'bxxx1_0000_0000_0000:begin HMASTER = 4'd12;HGRANTx = 16'h1000; end
endcase
round = 4'd14;
end
4'd14:begin//优先级(15,16,1,2,3,4,5,6,7,8,9,10,11,12,13,14)
casex(HBUSREQx)
16'bx1xx_xxxx_xxxx_xxxx:begin HMASTER = 4'd14;HGRANTx = 16'h4000; end
16'b10xx_xxxx_xxxx_xxxx:begin HMASTER = 4'd15;HGRANTx = 16'h8000; end
16'bxxxx_xxxx_xxxx_xxx1:begin HMASTER = 4'd0; HGRANTx = 16'h0001; end
16'bxxxx_xxxx_xxxx_xx10:begin HMASTER = 4'd1; HGRANTx = 16'h0002; end
16'bxxxx_xxxx_xxxx_x100:begin HMASTER = 4'd2; HGRANTx = 16'h0004; end
16'bxxxx_xxxx_xxxx_1000:begin HMASTER = 4'd3; HGRANTx = 16'h0008; end
16'bxxxx_xxxx_xxx1_0000:begin HMASTER = 4'd4; HGRANTx = 16'h0010; end
16'bxxxx_xxxx_xx10_0000:begin HMASTER = 4'd5; HGRANTx = 16'h0020; end
16'bxxxx_xxxx_x100_0000:begin HMASTER = 4'd6; HGRANTx = 16'h0040; end
16'bxxxx_xxxx_1000_0000:begin HMASTER = 4'd7; HGRANTx = 16'h0080; end
16'bxxxx_xxx1_0000_0000:begin HMASTER = 4'd8; HGRANTx = 16'h0100; end
16'bxxxx_xx10_0000_0000:begin HMASTER = 4'd9; HGRANTx = 16'h0200; end
16'bxxxx_x100_0000_0000:begin HMASTER = 4'd10;HGRANTx = 16'h0400; end
16'bxxxx_1000_0000_0000:begin HMASTER = 4'd11;HGRANTx = 16'h0800; end
16'bxxx1_0000_0000_0000:begin HMASTER = 4'd12;HGRANTx = 16'h1000; end
16'bxx10_0000_0000_0000:begin HMASTER = 4'd13;HGRANTx = 16'h2000; end
endcase
round = 4'd15;
end
4'd15:begin//优先级(16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15)
casex(HBUSREQx)
16'b1xxx_xxxx_xxxx_xxxx:begin HMASTER = 4'd15;HGRANTx = 16'h8000; end
16'bxxxx_xxxx_xxxx_xxx1:begin HMASTER = 4'd0; HGRANTx = 16'h0001; end
16'bxxxx_xxxx_xxxx_xx10:begin HMASTER = 4'd1; HGRANTx = 16'h0002; end
16'bxxxx_xxxx_xxxx_x100:begin HMASTER = 4'd2; HGRANTx = 16'h0004; end
16'bxxxx_xxxx_xxxx_1000:begin HMASTER = 4'd3; HGRANTx = 16'h0008; end
16'bxxxx_xxxx_xxx1_0000:begin HMASTER = 4'd4; HGRANTx = 16'h0010; end
16'bxxxx_xxxx_xx10_0000:begin HMASTER = 4'd5; HGRANTx = 16'h0020; end
16'bxxxx_xxxx_x100_0000:begin HMASTER = 4'd6; HGRANTx = 16'h0040; end
16'bxxxx_xxxx_1000_0000:begin HMASTER = 4'd7; HGRANTx = 16'h0080; end
16'bxxxx_xxx1_0000_0000:begin HMASTER = 4'd8; HGRANTx = 16'h0100; end
16'bxxxx_xx10_0000_0000:begin HMASTER = 4'd9; HGRANTx = 16'h0200; end
16'bxxxx_x100_0000_0000:begin HMASTER = 4'd10;HGRANTx = 16'h0400; end
16'bxxxx_1000_0000_0000:begin HMASTER = 4'd11;HGRANTx = 16'h0800; end
16'bxxx1_0000_0000_0000:begin HMASTER = 4'd12;HGRANTx = 16'h1000; end
16'bxx10_0000_0000_0000:begin HMASTER = 4'd13;HGRANTx = 16'h2000; end
16'bx100_0000_0000_0000:begin HMASTER = 4'd14;HGRANTx = 16'h4000; end
endcase
round = 4'd0;
end
endcase
end
FORBID:begin
HMASTER = HMASTER;
HGRANTx = HGRANTx;
end
endcase
end
endmodule到了这里，关于【AHB接口协议】固定优先级和轮询仲裁器的Verilog实现的文章就介绍完了。如果您还想了解更多内容，请在右上角搜索TOY模板网以前的文章或继续浏览下面的相关文章，希望大家以后多多支持TOY模板网！
